Reiner Pope – Chip design from the bottom up

Where this was said

Cache vs scratchpad

At 1:08:50 · chapter starts 1:04:07

CPU cache is 100× faster than DDR but introduces non-deterministic latency. TPU scratchpad uses explicit software instructions for each memory tier, enabling deterministic latency. Groq and TPUs advertise this. ^{[1] — Reiner Pope "A CPU cache lets hardware silently decide whether to fetch from fast on-chip memory or slow DDR — introducing non-deterministic latency. A …" 1:03:40 Play}

Technology

Cache is ~100× faster than DDR memory

Reiner Pope – Chip design from the bottom up · May 22, 2026

A CPU's on-chip cache is approximately two orders of magnitude (100×) faster than off-chip DDR memory, making it essential for reasonable CPU performance.

1:07:00 – 1:07:40

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Technology

CPU: ~1,000-way parallelism

Reiner Pope – Chip design from the bottom up · May 22, 2026

A modern CPU achieves roughly 1,000-way parallelism from ~100 cores each with ~16-way vector units, far less than a GPU.

1:08:20 – 1:08:50

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